DESCRIPTION
Adaptive Digital’s IP PBX chip provides all the DSP functionality needed in a small to medium size IP PBX telephone system. This solution is based upon Adaptive Digital’s field proven algorithms running on the Texas Instruments Low cost TMS320C5510™ digital signal processor (DSP).
FEATURES
Eight
TDM Channels can be used for Analog FXO, FXS, and digital trunks
Twelve VoIP Channels
Eight-way conferencing
Host processor interface
Based upon Texas Instruments TMS320C5510 low-cost low-power DSP
Scalable architecture
Programmable Time Slot Assigner
Loopback mode provided for testing
BLOCK DIAGRAM

Figure 1: Chip Block Diagram
The host/packet interface on the left side of figure 1 interfaces with a host processor. This interface is via the DSP 16-bit Host Port Interface (HPI). The coder blocks handle G.711 or G.729A encoding and decoding. The time slot assigner allows any coder block to be connected to any TDM channel. The TDM channels include Adaptive Digital’s AT&T certified G.168 echo cancellation, tone detection and generation, automatic and fixed gain control, and Caller ID transmit and receive. For more detail on the PCM processing, refer to figure 2.
An 8-way conference call node allows up to eight parties (a combination of VoIP and TDM channels) to be bridged together using Adaptive Digital’s carrier-class high-density conferencing algorithm.
Figure 2 shows the chip’s PCM processing. On the left side of the diagram, the PCM processing connects to the time slot assigner. On the right side of the diagram, the PCM processing connects to the TDM serial port.
The data from the TDM serial port is fed both to the Caller ID receiver and the G168 echo canceller. The Caller ID receiver decodes any inbound caller ID messages and sends the decoded messages to the host interface. The G.168 echo canceller removes echo from that might be present on the TDM input.
Figure 2: PCM Processing
The echo-cancelled signal is fed through a gains stage into the voice activity detector and the tone detector, both of which send their results to the host interface. The tone detector further feeds the tone suppressor which can optionally remove DTMF tones from the signal before feeding it to the AGC block. The output of the AGC is fed to the time slot assigner.
In the opposite direction, data from the time slot assigner is fed to a summation block where it optionally added to a locally generated tone. The sum is fed into a gain block and then into the echo cancller. This input to the echo canceller is only a reference signal.
The echo canceller does not cancel echo in this direction. The output of the echo canceller is optionally added to the caller ID generator, which generates a host-specified caller ID signal burst. The output of this summation block is fed to yet another summation block which can act as a three-way conferencing bridge. The output of this final summer is fed to the TDM bus.
All the algorithms are configurable using host interface API functions. The API functions are listed in table 1.
Typical Application
Figure 3 shows an example of how the IP PBX chip might be used in an IP PBX product.
In this example, four IP PBX chips are used to support an IP PBX that supports T1/E1 channel densities.

Figure 3: Typical Application
API Functions
The IP PBX chip API functions are listed in table 1.
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Table 1: Host API Functions
SITE LINKS
HOME Turnkey SOLUTIONS ![]()
RELATED LINKS
PRODUCT INDEX FAQs .pdf INDEX WHITE PAPERS DSP RESOURCE WIZARD
Solution BenefitsSystem designers can leverage a proven solution, allowing them to focus efforts on rapid product development.
Includes ANSI "C" API for host controller to ease integration.No DSP programming required.
Scalable to required product specific features to allow use of most cost effective DSP chip.
