AEC G4 - 4th GENERATION ACOUSTIC ECHO CANCELLER

Acoustic Echo Canceller - Gen 4 C55x, C64x , C64x+,C67x, & C674xAcoustic Echo Cancellation by Adaptive Digital

Acoustic Echo is caused by direct and indirect feedback from speaker to microphone. In order to combat the echo phenomenon, an echo canceller is employed. Today’s echo cancellers use sophisticated algorithms running on high speed Digital Signal Processors (DSPs)

The Adaptive Digital Technologies acoustic echo canceller electronically removes both direct coupling and reflected echo, enabling true full-duplex hands-free telephony both mobile phones, desktop speakerphones, and hands-free intercoms. Adaptive Digital has been developing echo canceller technology for over ten years. This acoustic echo canceller (AECG4) is the fourth generation (G4) acoustic echo canceller offered by Adaptive Digital.

The fourth-generation canceller includes a noise reduction feature, as well as the typical anti-howling, nonlinear processing, and double-talk detection found in the first generation AEC. The acoustic noise reduction feature is particularly useful during speakerphone calls where there is background noise present such as an exhaust fan, and in noisy outdoor environments.

By using Adaptive Digital’s acoustic echo canceller to eliminate this unwanted echo and reverberating interference, echo-free conversation can be achieved.

Data Sheet - .pdf

AVAILABILITY

ADT AEC G4 is available on the TMS320™ DSP Family
The AEC supports the TI xDAIS interface.
Target Processors:
C55x™DSP, C64x™DSP, C64x+™DSP, C67x+™DSP, and C674x™DSP Generations

FEATURES

Gen 4

  1. Functions are C-callable
  2. Multiple channel operation
  3. Parameters are user configurable
  4. Non-linear processor
  5. Excellent voice quality
  6. Fast Convergence
  7. No divergence due to doubletalk
  8. Automatic Gain Control
  9. Noise reduction
  10. Equalization
  11. xDAIS compliant


SPECIFICATION

C55x - CPU and Memory Utilization

All Memory usage is given in units of byte.

Processor MIPS Program Data Channel Scratch Constants
C55x 50* 40K 42K 35K 4K 3.6K

* The MIPS and memory based on the 64ms tail length setting.

Last update: 02/15/2010

C64x Memory Utilization

Memory utilization is divided into two categories: fixed length and variable length. Fixed-length memory requirements are shown in the following table.

Processor Program Data Constants
C64x+ 73862 481 1671
C674x 63270 521 1695

Notes:
All memory specifications including alignment requirements are given in units of 8 bit bytes.
Memory specified for builds that include both AGC and Noise Reduction

The variable length memory sections are further sub-divided into three categories:

  1. Common: initialized data (tables) that are common to all channels/instances

  2. Scratch: data that is used during a frame of AEC execution, but do not need to be preserved from one frame to the next. Scratch memory may be shared between channels that do not preempt each other.

  3. Per Channel: data that is used by a particular channel that must persist from the execution of one frame to the next.

 

The length of each variable length memory section is a function of some echo canceller setup parameters, as shown in the following table

Memory Usage Affecting Parameters:

  1. SamplingRate
  2. ActiveTailLength
  3. TotalTailLength
  4. Build Varian

Sample configurations

Parameters Section
Sampling Rate (Hz) Active Tail Length (msec) Total Tail Length (msec) Channel Scratch Common
8000 32 64 20888 3264 4032
8000 64 128 35608 3648 4416
16000 32 64 35608 3648 4416
16000 64 128 71192 4416 5184

Notes:
All memory specifications including alignment requirements are given in units of 8 bit bytes.
Memory specified for builds that include both AGC and Noise Reduction

  

Memory Usage Affecting Parameters:
Sample configurations

C64x CPU Utilization

The following table contains CPU utilization of the AEC as a function of sampling rate, tail length, and processor. The CPU utilization is given in Millions of Instruction Cycles Per Second per channel. This is also referred to as MIPS, which we also equate to processor clock speed specified in MHz.

Parameters
Sampling Rate (Hz) Active Tail Length (msec) Total Tail Length (msec) C64X+ C674X
8000 32 64 24 24
8000 64 128 29 29
16000 32 64 54 54
16000 64 128 71 71

FUNCTION

AECG4_ADT_create(…) Create and initializes an echo canceller channel
AECG4_ADT_applyl(…) Executes cancellation function
AECG4_ADT_backgroundHandler(…) Handles background calculations
AECG4_ADT_delete(…) Deletes an echo canceller channel

 

 

 

PRODUCTS