G.722 | G.722 PLC HD Codec

G.722 PLC - ITU AUDIO VOCODER with Packet Loss Concealment

G.722 includes a proprietary VAD/CNG/DTX – (Voice Activity Detection, Comfort Noise Generation / Discontinuous Transmission) features.

Global Telecom Business

Features List

  • Functions are C-callable.
  • Multi-channel capable
  • Can be integrated with echo cancellers, VOX and tone detection/regeneration.
  • Can be integrated with G.711/G.728 to provide the audio portion of the H.320 video standard.
  • The encoder and decoder meet all ITU G.722 compliance data files.
  • C55x and ARM – Optional Packet Loss Concealment (PLC): Proprietary technique developed by Adaptive Digital.
  • ARM, Win32, and i686 – Optional PLC compliant to G.722 Appendix IV Standard

Coding Rate: 48, 56, or 64 kbps, and 23.85 kbps
Sampling Rate: 16 kHz
Delay: 125 microseconds

Availability

PlatformsG.722G.722 with PLCG.722 AnnexIV
Arm ® Devices – Armv7-A / Armv8-A || Armv7-M / Armv8-M || Legacy M3, ARM9E Armv7-A / Armv8-A || Armv7-M / Armv8-M || Legacy M3, ARM9E /11Armv7-A / Armv8-A || Armv7-M / Armv8-M || Legacy M3, ARM9E /11Armv7-A / Armv8-A || Armv7-M / Armv8-M || Legacy M3/ARM9E /11
Texas Instruments – TI TMS320C6000 C64x/C64x+/C66x, C674x, TMS320C5000 C55x / C54xC674x / C64x / C55x / C54x
Windows x86 (32-bit) / x64 (64-bit)Win 32-bit LIB / DLLWin 32-bit LIB / DLL
Linux 32-bit / 64-bitLinux 32-bitLinux 32-bit

ADT G.722 is available on the above Platforms: Other configurations are available upon request.

Specifications

NOTE: We specify MIPS (Millions of Instructions Per Second) as MCPS (Millions of Instruction Cycles Per Second). Unless otherwise specified, peak MIPS are indicated.

CLICK ON THE FOLLOWING LINKS FOR SPECIFICATION TABLES

G.722 Armv9-A Neoverse N2

CPU Utilization
The ARM Neoverse is a group of 64-bit ARM processor cores.
FunctionMIPS
G.722 Encode/Decode2.6
The ARM Neoverse is a group of 64-bit ARM processor cores licensed by Arm Holdings.

G.722 Armv8-A Cortex-A53 / A72

CPU Utilization & Memory Requirements
All Memory usage is given in units of byte.
FunctionMIPS Cortex- A53MIPS Cortex-A72Program MemoryData MemoryPer Channel Data Memory
G.722 Encode/Decode5.73.87k2k150

G.722 Armv7A Cortex-A8 / A9 / A15 / A17

CPU Utilization & Memory Requirements
All Memory usage is given in units of byte.
FunctionMIPS Cortex- A8 / A9 / A15Program MemoryData MemoryPer Channel Data MemoryScratch Memory
G.722 Encode4.069961284146624
G.722 Decode3.5624

G.722 with PLC Armv7A Cortex-A8 / A9 / A15 / A17

CPU Utilization & Memory Requirements
All Memory usage is given in units of byte.
FunctionMIPSProgram MemoryData MemoryPer Channel Data Memory
G.722 Encode13.5

42 K
7.6 K288
G.722 Decode7.4288
G.722 Decode w/ PLC Enable11.14248

G.722 Annex IV Cortex-A8 / A9 / A15 / A17

CPU Utilization & Memory Requirements
All Memory usage is given in units of byte.
FunctionMIPSProgram MemoryData MemoryPer Channel Data Memory
G.722 Encode13.5

43 K
7.7 K288
G.722 Decode7.4288
G.722 Decode w/ PLC Enable11.12020

G.722 Cortex-M4

CPU Utilization & Memory Requirements
All Memory usage is given in units of byte.
FunctionMIPS Cortex-M4Program MemoryData MemoryPer Channel Data MemoryScratch Memory
G.722 Encode13.469961284146624
G.722 Decode13.0624

G.722 with PLC Cortex-M4

CPU Utilization & Memory Requirements
All Memory usage is given in units of byte.
FunctionMIPSProgram MemoryData MemoryPer Channel Data Memory
G.722 Encode16.130 K1.5 K288
G.722 Decode15.2288
G.722 Decode w/ PLC Enable22.34248

G.722 with PLC Cortex-M33/M35 – estimate

CPU Utilization & Memory Requirements
All Memory usage is given in units of byte.
FunctionMIPSProgram MemoryData MemoryPer Channel Data Memory
G.722 Encode12.930 K1.5 K288
G.722 Decode12.2288
G.722 Decode w/ PLC Enable17.84248

* Adaptive Digital’s G.722 ARM-Cortex-A device family version also has optional packet loss concealment (PLC) plus a proprietary   VAD/CNG/DTX feature.

G.722 Annex IV Cortex-M4

CPU Utilization & Memory Requirements
All Memory usage is given in units of byte.
FunctionMIPSProgram MemoryData MemoryPer Channel Data Memory
G.722 Encode16.1
30 K
1.7 K288
G.722 Decode15.2288
G.722 Decode w/ PLC Enable21.32020

G.722 Annex IV Cortex-M33/M35 – estimate

CPU Utilization & Memory Requirements
All Memory usage is given in units of byte.
FunctionMIPSProgram MemoryData MemoryPer Channel Data Memory
G.722 Encode12.930 K1.7 K288
G.722 Decode12.2288
G.722 Decode w/ PLC Enable172020

G.722 ARM9e / ARM11 Legacy

CPU Utilization & Memory Requirements
All Memory usage is given in units of byte.
DeviceMIPSProgram MemoryData MemoryPer Channel Data Memory
ARM9e25.55.3 K1.3 K292
ARM1141.45.3 K292

G.722 with PLC ARM9e / ARM11

CPU Utilization & Memory Requirements
All Memory usage is given in units of byte.
FunctionMIPSProgram MemoryData MemoryPer Channel Data Memory
G.722 Encode11.3
34 K
7.6 K288
G.722 Decode11288
G.722 Decode w/ PLC Enable16.94248

*PLC Decode MIPS measurement taken with simulated 2% packet loss.

G.722 Annex IV ARM9e / ARM11

CPU Utilization & Memory Requirements
All Memory usage is given in units of byte.
FunctionMIPSProgram MemoryData MemoryPer Channel Data Memory
G.722 Encode11.3

58 K
7.7 K288
G.722 Decode11288
G.722 Decode w/ PLC Enable16.92020

G.722 C64x / C64x+ / C66x / C674x

CPU Utilization & Memory Requirements
All Memory usage is given in units of byte.
FunctionMIPSProgram MemoryData MemoryPer Channel Data Memory
G.722 Encode5.347681426192
G.722 Decode4.8

G.722 C64x / C64x+ Variant

PROCESSES 2 CHANNELS SIMULTANEOUSLY THEREBY BY REDUCING THE PER CHANNEL MIPS BY A FACTOR OF 2
CPU Utilization & Memory Requirements
All Memory usage is given in units of byte.
DeviceMIPSProgram MemoryData MemoryPer Channel Data Memory
Encode Variant2.8480001664364
Decode Variant2.36

 Variant *Note:  Above numbers for non-cached.  After caching, cycle count will improve.

G.722 C55x

CPU Utilization & Memory Requirements
All Memory usage is given in units of byte.
DeviceMIPSProgram MemoryData MemoryPer Channel Data Memory
Encode6.027171212164
Decode4.8164
Decode with PLC* enable5.538116093528

  *Note: Proprietary technique developed by Adaptive Digital.

G.722 C54x

CPU Utilization & Memory Requirements
All Memory usage is given in units of byte.
FunctionMIPSProgram MemoryData MemoryPer Channel Data Memory
Encode7.5143865480
Decode6.480

G.722 C64x / C64x+ / C66x / C674x

CPU Utilization & Memory Requirements
All Memory usage is given in units of byte.
FunctionMIPSProgram MemoryData MemoryPer Channel Data Memory
G.722 Encode5.347681426192
G.722 Decode4.8

G.722 C64x / C64x+ Variant

PROCESSES 2 CHANNELS SIMULTANEOUSLY THEREBY BY REDUCING THE PER CHANNEL MIPS BY A FACTOR OF 2
CPU Utilization & Memory Requirements
All Memory usage is given in units of byte.
DeviceMIPSProgram MemoryData MemoryPer Channel Data Memory
Encode Variant2.8480001664364
Decode Variant2.36

 Variant *Note:  Above numbers for non-cached.  After caching, cycle count will improve.

G.722 C55x

CPU Utilization & Memory Requirements
All Memory usage is given in units of byte.
DeviceMIPSProgram MemoryData MemoryPer Channel Data Memory
Encode6.027171212164
Decode4.8164
Decode with PLC* enable5.538116093528

  *Note: Proprietary technique developed by Adaptive Digital.

G.722 C54x

CPU Utilization & Memory Requirements
All Memory usage is given in units of byte.
FunctionMIPSProgram MemoryData MemoryPer Channel Data Memory
Encode7.5143865480
Decode6.480

G.722 C64x / C64x+ / C66x / C674x

CPU Utilization & Memory Requirements
All Memory usage is given in units of byte.
FunctionMIPSProgram MemoryData MemoryPer Channel Data Memory
G.722 Encode5.347681426192
G.722 Decode4.8

G.722 C64x / C64x+ Variant

PROCESSES 2 CHANNELS SIMULTANEOUSLY THEREBY BY REDUCING THE PER CHANNEL MIPS BY A FACTOR OF 2
CPU Utilization & Memory Requirements
All Memory usage is given in units of byte.
DeviceMIPSProgram MemoryData MemoryPer Channel Data Memory
Encode Variant2.8480001664364
Decode Variant2.36

 Variant *Note:  Above numbers for non-cached.  After caching, cycle count will improve.

G.722 C55x

CPU Utilization & Memory Requirements
All Memory usage is given in units of byte.
DeviceMIPSProgram MemoryData MemoryPer Channel Data Memory
Encode6.027171212164
Decode4.8164
Decode with PLC* enable5.538116093528

  *Note: Proprietary technique developed by Adaptive Digital.

G.722 C54x

CPU Utilization & Memory Requirements
All Memory usage is given in units of byte.
FunctionMIPSProgram MemoryData MemoryPer Channel Data Memory
Encode7.5143865480
Decode6.480

Description

The Adaptive Digital Technologies G.722 Audio Coder is a real-time implementation of the ITU G.722 audio coder. It is used with many applications that require audio frequency bandwidth coding such as video conferencing, multimedia, and speaker/microphone digital telephony. The G.722 audio coder encodes 16 kHz sampled audio signals for transmission over 48, 56, and 64 kbps channels, and provides 7 k Hz of audio bandwidth.

Adaptive Digital’s G.722PLC is a high quality low-complexity proprietary algorithm for packet loss concealment with G.722. G.722 on TI’s C55x™DSP, and ARM devices support an optional Packet Loss Concealment (PLC) features on the decoder side. We also offer a PLC algorithm compliant to the G.722 Appendix IV Standard.

Adaptive Digital’s implementation of G.722 includes a proprietary VAD/CNG/DTX (Voice Activity Detection, Comfort Noise Generation / Discontinuous Transmission) feature. While many VoIP and wireless codecs include this type of functionality as part of the standard, G.722 does not. Adaptive Digital therefore implemented a proprietary implementation that is voice-quality-optimized for the G.722 codec. Adaptive Digital plans to make this available on other platforms in the near future.

In Appendix IV, the decoder comprises three stages: lower sub-band decoding, higher sub-band decoding and quadrature mirror filter (QMF) synthesis. In the absence of frame erasures, the decoder structure is identical to ITU-T G.722, except for the storage of the two decoded signals, of the higher and lower sub-bands. In case of frame erasures, the decoder is informed by the bad frame indication (BFI) signalling. It then performs an analysis of the past lower-band reconstructed signal and extrapolates the missing signal using linear predictive coding (LPC), pitch-synchronous period repetition and adaptive muting. Once a good frame is received, the decoded signal is cross-faded with the extrapolated signal. In the higher sub-band, the decoder repeats the previous frame pitch synchronously, with adaptive muting and high pass post-processing. The adaptive differential pulse code modulation (ADPCM) states are updated after each frame erasure.

Function APIs

API function call summary

ResetG722 ()

EncodeG722 ()

DecodeG722  ()

Initializes the G.722 audio coder Channel structures

Executes the G.722 encoder

Executes the G.722 decoder

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