Echo Cancellation Chip

EC CHIP

The Adaptive Digital Technologies echo canceller chip is a carrier-class ITU G.168-2002 compliant PCM network echo canceller chip. The solutions are based upon Adaptive Digital's AT&T certified soft echo canceller running on the Texas Instruments TMS320C6424 (HD - High Density), 'C5507, and 'C5510 digital signal processors.

EC Chip
Part Number	DEVICE	PORTS	DTMF
EC-C5507-4	C5507	4
EC-C5507-8	C5507	8
EC-C5510-12	C5510	12
EC-C5510-24	C5510	24
EC-C5510-32	C5510	32	included
HDEC-C6424-64	C6424	64	preliminary
HDEC-C6424-128	C6424	128	preliminary

The ADT EC Chip supports both T-1 and E-1 configurations.

The EC Chip uses two TDM serial ports, one for the receive side of the canceller and the other for the send side of the canceller. The TDM serial ports are fully programmable to allow connection to nearly any type of serial bus.

The EC Chip includes Adaptive Digital's proprietary voice quality enhancement algorithms including noise reduction and automatic level control. These features, in conjunction with the echo canceller, ensure maximum voice quality.

CHANNEL DENSITY
	Echo Canceller		Echo Canceller with Noise Reduction and Automatic Level Control
	T-1 Spans	E-1 Spans	T-1 Spans	E-1 Spans
32 msec. tail	9	7	4	3
64 msec. tail	7	6	3	2
128 msec. tail	5	4	2	2
EC Off	N/A	N/A	6	4

TABLE: 1

Control of the EC Chip is facilitated by using an ANSI "C" set of API functions that are provided to run on the host processor. These functions configure and control the EC Chip as well as return status information to the host application.

FEATURES

Certified by AT&T Voice Quality Lab
ITU G.168-2002 Compliant
Compliant using all ITU hybrid models
Low Throughput Delay (500 microseconds)
Supports up to 240 channels
Adaptive Non-linear processor
Comfort Noise Generator
Operates in SS-7 Networks
No divergence due to double-talk
G.164/G.165 Tone Disabler
Noise Reduction
Programmable "Aggressiveness"
Adapts to background noise continuously
Automatic Level Control
Programmable maximum gain/loss
Programmable Output Target Level

CHIP CONFIGURATION

The EC Chip needs to be configured at power up. Configuration parameters for the serial ports, echo canceller, automatic level control, and noise reduction are described in the sections that follow.

SERIAL PORT CONFIGURATION

The EC Chip can operate using either one or two TDM serial ports. Although time slot mapping can be done, there are default time slot mappings for both the single port and the two port configurations. If two serial ports are used (ports 0 and 1), a single echo canceller channel operates on a given time slot on both serial ports. For example, echo canceller channel 0 is connected to serial port 0, time slot 0 for its receive side and it is connected to serial port 1, time slot 0 for its send side. If a single serial port is used, the receive and send sides use even and odd time slots. In this case, the receive side would be connected to serial port 0, time slot 0 and the send side would be connected to serial port 0, time slot 1

In order to interface to a wide variety of serial TDM busses, the EC Chip serial port configuration is programmable. Table 1 below describes the serial port configuration parameters.

Serial Port Characteristics
PARAMETER	VALID RANGE	DEFAULT VALUE
Serial Port 0	Enabled/Disabled	Enabled
Serial Port 1	Enabled/Disabled	Enabled
Number of Time Slots	0..255	128
Use Standard Mapping	True / False	True
Data Format	u-Law, A-Law, 8 bit Linear, or 16 bit Linear	u-Law
Transmit Sync Polarity	Active High or Active Low	Active High
Receive Sync Polarity	Active High or Active Low	Active High
Transmit Clock Polarity	Rising Edge or Falling Edge	Rising Edge
Receive Clock Polarity	Rising Edge or Falling Edge	Falling Edge
Transmit Data Delay	0 to 2	1
Receive Data Delay	0 to 2	1
DX Pin Delay	Enable or Disable	Disable

TABLE: 2

ECHO CANCELLER CONFIGURATION

The echo canceller algorithm has numerous programmable options to allow it to be configured appropriately for a wide variety of applications. When bi-directional cancellation is selected, the canceller is independently programmable in each direction. Table 3 lists the echo canceller configuration parameters.

Echo Canceller Configuration Parameters
PARAMETER	VALID RANGE	DEFAULT VALUE
Global Echo Canceller Enable	Enabled/Disabled	Enable
Tail Length	32, 64, and 128 milliseconds	128
NLP Type	Off, Mute, Random Noise, or Hoth Noise	Hoth Noise
NLP Threshold	12, 18, 24 dB	24
CNG Threshold	-40..-60 dBm	-43 dBm
Double TalkThreshold	0 to 12 (units of dB)	4
G.165 Detect Enable	Enable or Disable	Enable
Adapt Enable	Enable or Disable	Enable
Number of reflectors	1 to 3 - The initial value can not be exceeded at run time.	3
Reflector Length	4, 8, 12, 16 milliseconds	8

TABLE: 3 Echo Canceller Configuration Parameters
Note that the tail length affects the channel density of the chip.

Automatic Level Control Configuration

ALC Configuration Parameters
PARAMETER	VALID RANGE	DEFAULT VALUE
Global ALC Enable	Enabled/Disabled	Enable
Target Power	-30 to 0 (units of dBm)	-18
Loss Limit	-23 to 0 (units of dB)	-10
Gain Limit	0 to 23 (units of dB)	10

Table 4 lists the configuration parameters that control the operation of the Automatic Level Control (ALC) feature.

Echo canceller channels are turned on and off as needed under control of a host processor. Each time a channel is turned on, it is necessary to provide call setup information. Since an echo canceller is a two port device, we define the two ports as side A and side B. The canceller can be configured to cancel echo in neither, one, or both directions. If echo cancellation is enabled at the A side, the echo perceived by the speaker at the B side will be cancelled. If echo cancellation is enabled at the B side, the echo perceived by the speaker at the A side will be cancelled.

CHANNEL SET-UP

Channel Setup Parameters
PARAMETER	VALID RANGE	DEFAULT VALUE
A Side Serial Port	0.1
A Side Time Slot	0..255
B Side Serial Port	0.1
B Side Time Slot	0..255
Enable A Side EC	Enable/Disable	Enable
Enable B Side EC	Enable/Disable	Disable

Table 5: Channel Setup Parameters

If the EC Chip is configured for standard serial port mapping, the B side time slot will be derived from the A side time slot.

Online Control and Status Reporting In order to perform diagnostics and testing, a number of controls are provided to modify the state of an active channel.

Channel Control Parameters
PARAMETER	VALID RANGE	DEFAULT VALUE
EC Enable	Enable/Disable	Global
EC Adapt Enable	Enable/Disable	Enable
EC NLP Enable	Enable/Disable	Enable
EC CNG Enable	Enable/Disable	Enable
ALC Enable	Enable/Disable	Global
Noise Reduction Enable	Enable/Disable	Global

Table: 6 lists the features that be controlled during an active call.

PARAMETER	VALID RANGE
Convergence Status	0..32767
G.165 Tone Detector Status	Null, G.164 Active, G.165 Active

Table: 7 lists the status parameters that are available during an active call.

EC Chip ANSI "C" API
Control of the EC Chip is facilitated by using an ANSI "C" set of API functions that are provided to run on the host processor. These functions configure and control the EC Chip as well as return status information to the host application.