High Definition AEC Hardware Reference Design
High fidelity, near-field two-way audio C5517 DSP reference design: TIDA-01589
Features the High-Definition Acoustic Echo Canceller (HD AEC™)
The TIDA-01589 reference design demonstrates dual microphones for audio input via stereo ADC, low-power DSP performing noise reduction, acoustic echo cancellation, beamforming, and automatic gain control audio quality enhancement algorithms.
Fast-Fact Demo Specs
Audio Algorithms: HD AEC, NR, Beamforming, and AGC
HD AEC Echo Tail – 128msec
Mips – Total AEC+NR+BF < 160 MIPS
Memory – Total Memory (Data + Program) fits into internal 5517 RAM
Audio – 16 kHz sample rate, 16-bit linear sample
TIDA-01589 features Adaptive Digital’s multi-microphone capable acoustic echo cancellation algorithm HD AEC, and additionally includes acoustic beamforming, noise reduction, anti-howling, adaptive filtering, nonlinear processing, and double talk detection software to produce a high-quality, full-duplex, real-time communication between two participants.
HD AEC on TI DSPs
Specifications: Audio algorithms running on C5517™ DSP
MIPS and Memory Usage DataMIPS and memory usage data algorithms running on C5517 DSP
All memory usage and instance data given in bytes
|DSP Algorithm||MIPS||Program Memory||Data Memory||Memory Total||Instance Size||Number Instances||Instance Total|
|Fixed Beamformer||9.2 Avg | 9.3 Peak||6844||344||7188||1360||2||2720|
|Noise Reduction||13.2 Avg | 13.5 Peak||7429||1926||9355||4886||2||9772|
|HD AEC||113.1 Avg | 131.1 Peak||54617||11608||66225||67120||1||67120|
|Full DSP Application||136.6 Avg | 157.3 Peak||308142|
HD AEC™ Signal Flow on TIDA-01589 Hardware
The figure above shows a diagram with the signal flow for this application. The “near side” participant’s voice is input through the 2-mic array on MIC board and sampled at 16-kHz (wideband) rate by the TLV320ADC3101 low-power stereo ADC. Digital PCM audio samples are passed from the audio ADC to the TMS320C5517 DSP over I2S where beamforming (BF) is performed and the HD AEC™ is running.
Processed (clean) audio samples from DSP are passed as PCM data over I2S to the BeagleBone Black Wireless (BBB-W). BBB-W is used to tie in the “far side” participant and provides audio playback over USB to a headset attached to it. A microphone in the headset of the far-side participant will take voice input and pass it via BBB-W to the DSP over I2S interface.
The DSP application provides a clean audio signal to TAS2557 over I2S which drives a micro-speaker attached to the DSP board. TAS2557 features an ultra-low noise digital-to-analog converter (DAC) and Class-D power amplifier with speaker voltage and current sensing feedback. An on-chip DSP provides speaker protection algorithms, tuned to the micro-speaker for maximizing audio output while maintaining safe speaker operation.
The algorithms and processing written by Adaptive Digital Technologies for this demonstration correct for the problems that are found in microphone array and loud-speaker applications. Beamforming (BF), noise reduction (NR) and adaptive filtering algorithms focus the processing system on speech as the critical audio signal and filter out other high-frequency and low-frequency signals in the environment. Non-linear processing helps account for the artifacts introduced by the acoustic characteristics of the system. HD AEC is responsible for removing the echo coming from the 2-way real-time nature of the communication. Anti-howling and double talk detection work to balance audio signals, remove jitter in the transmitted signal and improve the overall quality of the final signal.
The HD AEC features very fast convergence and demonstrates virtually no audio artifacts being transmitted based on a changing environment on the near-side. The HD AEC handles echo tails of up to 128 ms. A long echo tail allows the echo canceller to listen longer for audio reflections to remove. Short tail lengths mean a greater likelihood that acoustic echoes will be transmitted. Being a programmable DSP-based solution, the HD AEC is customizable for shorter or longer tail lengths (based on available processing resources) to more accurately suit the system environment.
HD AEC Features List
- True full-duplex operation under a wide dynamic range of audio levels, even when microphone input signal is weak
- Programmable sampling rate, supporting narrowband (8 kHz), and wideband (16 kHz) (rates limited due to C5517 memory and CPU )
- Improved adaptive nonlinear processor
- Handles echo tails of up to 128 msec. (C5517 demo default setting), with full-duplex cancellation. HD AEC algorithm is capable of handling tail lengths in excess of 500 msecs.
- Spectrally representative comfort noise generator
- Automatically adjusts for unknown bulk (buffering/audio driver) delay
- Able to handle strong echo (speaker to microphone gains up to 20 dB)
- Instantly adjusts to user-controlled speaker gain changes
- Handles external user-controlled volume changes
- Parameters are user configurable
- Improved fast convergence and reconvergence
- No divergence during double-talk
- Integrated Automatic Gain Control (AGC)
- Improves speech recognition performance in an echoic environment.
- Integrated Noise Reduction (NR)
- Integrated Transmit Equalization
Click here to view HD AEC CPU Usage and Memory Requirements: Texas Instruments’ TMS320C6000, TMS320C5000 | Arm Architectures (v5, v6, v7-A/R, Armv7E-M, Armv8-A, Armv8-R) | Linux 32-bit/64-bit | Windows x86 / x64.
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